The length of interconnects between and within microprocessor data paths in functional unit blocks has increased as integration density has increased in integrated circuits (ICs). Because interconnect capacitance per unit length increases rapidly with lateral dimension scaling, long point-to-point interconnects may cause performance and power bottlenecks in ICs.
The substitution of dynamic CMOS interconnect drivers for static CMOS drivers in high performance on-chip busses has been explored. In busses with static drivers, when neighboring wires switch in the opposite directions, e.g., from Vss to Vcc on one wire and from Vcc to Vss on its neighbor, the voltage drop on the terminal of the parasitic capacitor between the two wires is not Vcc-Vss, but is doubled to (Vcc-Vss)*2. Due to the Miller effect, the effective capacitance seen by the wire is doubled, yielding a Miller Coupling Factor (MCF) of 2.0. In busses with dynamic drivers, all wires are reset to a pre-charge state (for example, Vss) in a pre-charge portion of the clock cycle, and then may either remain at that state or switch to an opposite state (Vcc in this example) in an evaluate portion of the cycle. Thus two neighboring wires cannot switch in opposite directions from the pre-charge state, and the maximum voltage drop on the terminals of the parasitic capacitors between the two wires will be (Vcc-Vss). Thus, the MCF is reduced from 2.0 in static CMOS drivers to 1.0 in dynamic CMOS drivers, thereby reducing a large component of the wire's worst-case effective coupling capacitance. However, dynamic circuits tend to be more susceptible to noise than static circuits. This may not present a problem in circuits where the inputs are well shielded, but may present a problem in dynamic busses, where the distance from the driver and the large resistance of the interconnect isolate the end of a bus segment from its restoring impedance.